Compiling Code using Makefiles

For people new to coding or using supercomputers to submit jobs, compiling can be a new concept. In programming, a compiler takes source code (e.g. written in C/C++, Python, Fortran, etc.) and translates it into a lower-level programming language (e.g. assembly language or machine code). When a compiler runs successfully, the source code will be converted to an executable program which the computer understands how to run.   For more info on compilers, check out this video

To compile a program, we use the ‘make’ command. When we have multiple source files (which we often do when running complex water management models), a makefile file helps organize directions to give to the compiler. If you are not creating a model from scratch, you may already have an existing makefile which are conventionally named ‘makefile’ or ‘Makefile’. If that is the case, compiling is easy if all the files are in the proper directory. Simply type ‘make’ in the command line interface to compile your code.

If you would like to edit your makefile, create one from scratch, or just want to learn more about the ‘make’ command and makefiles, check out the resources below:

Introduction to ‘make’ and compiler options:

Introductory tutorials for makefiles:

Makefile naming:

Makefile macros:

Example Makefile:

The conventional file organization for this work is to create a src (or source) and bin (or binary) directory. The source code will go in /src while the makefile and any input files will go in /bin. Once the executable is created, it will be located in /bin as well. Below is a truncated version of a makefile I made for a water treatment plant model based on a makefile I found for LRGV.

MAIN_DIR=./.. #from within /bin go to main directory which contains /bin and /src directories

SOURCE_DIR = $(MAIN_DIR)/src #navigate to directory which contains source code

SOURCES =                      \ #list all source code files 
   $(SOURCE_DIR)/adj_fact.c    \
   $(SOURCE_DIR)/basin.c       \
   $(SOURCE_DIR)/breakpt.c     \
   #I’ll leave out some files for the sake of space
   $(SOURCE_DIR)/unittype.c    \
   $(SOURCE_DIR)/uptable.c     \
   $(SOURCE_DIR)/writewtp.c    \

OBJECTS=$(SOURCES:.c=.o) #name object files based on .c files
CC=g++ #select the type of compiler. Although the source files are in C a C++ compiler is compatible
CFLAGS=-c -O3 -Wall -I. -I$(SOURCE_DIR) #set flags for the compiler
EXECUTABLE=wtp_v2-2_borg-mp #name of the executable file

all: $(SOURCES) $(EXECUTABLE)
    rm -rf $(SOURCE_DIR)/*.o

$(EXECUTABLE): $(OBJECTS)
    $(CC) $(OBJECTS) -o $@

.c.o:
    $(CC) $(CFLAGS) $^ -o $@

clean: #’make clean’ will remove all compilation files
    rm -f $(SOURCE_DIR)/*.o $(EXECUTABLE)

 

 

 

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One thought on “Compiling Code using Makefiles

  1. Pingback: Getting started with C and C++ – Water Programming: A Collaborative Research Blog

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